Parallel Design Of Kernel Solver In FPGA-based Real-time Simulator For Active Distribution Networks

The dynamic characteristics of active distribution network(ADN)are becoming more and more complex as a result of the integration of distributed generators(DG).The diverse equipment and increasing system scale put forward higher requirements on real-time simulation of ADNs.Due to the advantages on low cost,small size,highly reconfigurable and scalable,the field programmable gate array(FPGA)based simulator has been widely used in the area of real-time simulation.The kernel solver is an important part of the real-time simulator,which is used to solve the nodal equations in each time-step.Its velocity,accuracy and resource consumption have a significant influence on the overall performance of the simulator.After fully considering the hardware characteristics of FPGA,this thesis proposes the parallel design method of the kernel solver in FPGA-based real-time simulator for ADNs,which could improve the efficiency of simulator.The main contribution is summarized as follows:1)The framework of kernel solver is designed,which is based on LDU algorithm.The multi-level parallel architecture of kernel solver,which consists of the system level design,module level design and elementary level design,is proposed to fully exploit the parallelism of FPGA based kernel solver.2)A fine-grained design of kernel solver for FPGA-based real-time simulator is proposed.It is mainly based on LDU decomposition algorithm,and the parallel design of module level and elementary level is realized.The whole process can be divided into offline preconditioning process and online solving process.By making full use of the inherent parallelism characteristic of FPGA,the computational efficiency of the kernel solver is improved.3)A parallel design of kernel solver for FPGA-based real-time simulator is proposed.On the basis of the fine-grained design of the kernel solver,the parallel design on system level is realized.The overall system is divided into several subsystems by the graph partition method in order to be solved in parallel,which further improves the computational efficiency of the kernel solver.4)Typical distribution networks are selected to test the proposed fine-grained design and parallel design of the kernel solver.Through the analysis of the simulation scale and solving speed of the kernel solver,and the comparison with the simulation results of PSCAD/EMTDC,the correctness and effectiveness of the design scheme are fully verified.