Simulation And Analysis Of Thermal Characteristics Of High Power LD Chip Packages

High-power semiconductor lasers(LDs)have various applications in material processing,medical aesthetics and laser pump sources.The terminal applications place higher demands on the output power and reliability of the devices.Heat dissipation optimization and the design of new package structures are becoming increasingly important.In the paper,finite element method(FEM)is used to simulate the steady-state thermal characteristics of high-power LDs and the influence of package parameters on the thermal characteristics of high-power LD chips is analyzed,which has certain reference significance for improving device reliability.The main research contents and results are as follows.1.Afinite element thermal analysis model for single emmiter in COS(Chip On Submount)package based on a package prototype(the paper model)and a simple rectangular stacked structure finite element thermal analysis model(simple model)were established.The average error between the simulation results and the actual active layer temperature for several devices using the two models was 4.66%and 15.03%respectively when the bottom of the heat sink at 25?.2.The effect of solder parameters on the heat dissipation of LD chips was studied.The results show that In,InSn and AuSn solders,all exhibit an increase temperature in chip active layer and a decrease thermal stress as the solder layer thickness increases;the simulation results of AuSn solder layer voids parameters show that for the same void ratio,the average temperature rise in the active layer of the chip is greater when the distribution of voids is multiple small voids,and the maximum temperature rise in the active layer of the chip is greater when the distribution of voids is a single large void.3.The effect of heat sink parameters on the heat dissipation of LD chips was investigated.The simulation results show that the heat sink of AlN,BeO,Si3N4,Cu and Cu-diamond all show an increase in chip active layer temperature and thermal stress as the thickness of the heat sink increases.A new composite structure heat sink design was completed,which reduced the thermal resistance of the device by 0.39?/W,increased the heat dissipation level by 17.03%and reduced the maximum thermal stress of the chip by 17.12%compared to the conventional heat sink.4.A finite element thermal analysis model of the high power LD bar in conduction cooling package is established,and the simulation yields a maximum chip temperature of 85.07? in the bottom heat dissipation package structure,device thermal resistance of 1.20?/W,and maximum thermal stress of 50.77 MPa on the chip,get the conclusion that the depth of the isolation slot has only a slight effect on device heat dissipation.Compared to the bottom heat dissipation structure,the back heat dissipation package structure has a 35.83%increase in device thermal dissipation capacity and a 23.68%increase in maximum chip stress.A new double-sided heat dissipation composite package structure was designed,which improved the device heat dissipation capacity by 28.33%and reduced maximum thermal stress of the chip by 26.43%compared to the bottom heat dissipation package structure.