In the growing field of digital system design, there is a great need for design tools that will assist the engineer in developing large scale systems. AHPL, A Hardware Programming Language, is a hardware description language which allows a digital system to be described, evaluated, and analyzed. But like many design tools, AHPL cannot satisfy the multitude of design tool applications.;In order to enhance the power of AHPL as a design tool, an EDIF translator is developed. The EDIF translator generates an EDIF netlist of an AHPL design, thus making it possible to port AHPL designs to other design tools. |