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Tolerance reasoning for concurrent CAD/CAM systems

Posted on:1994-09-12Degree:Ph.DType:Thesis
University:Stanford UniversityCandidate:Tsai, Jhy-CherngFull Text:PDF
GTID:2472390014494555Subject:Engineering
Abstract/Summary:
Tolerances reflect a designer's intentions regarding product functional and behavioral requirements with corresponding implications for manufacturing and quality control. Analysis to evaluate the effects of tolerances on the product performance is complicated and difficult because it involves non-linearities. The analysis is based on a tolerance representation scheme that captures the designer's intentions and tolerancing models that describe the effects of individual tolerances on the product performance. In this thesis, a theory for a tolerance reasoning framework, as part of a concurrent product and process design system, is developed and implemented. The capabilities of the framework include: (i) a uniform scheme for representing the dimensioning and tolerancing scheme and mating specifications of a product, (ii) a unified method for error analysis caused by tolerances and clearances, (iii) a method for reasoning about an over-toleranced design (a design with redundant tolerancing specifications), and (iv) fast computational methods for tolerance analysis to support concurrent engineering systems.;The representation scheme employs a symbolic constraint graph, called the tolerance network, to represent a product dimensioning, tolerancing, and mating specifications as variational geometric constraints among features. The network, generated as a result of product decomposition, represents the designer's intentions associated with the product dimensioning and tolerancing scheme and mating specifications. It also supports different tolerancing types (e.g., interval or statistical). Errors of geometric features caused by manufacturing tolerance stackup and clearance fits are manipulated throughout the network by mapping tolerance and clearance specifications to geometry. The critical and dominant paths of an over-toleranced design, which form loops in the tolerance network, are identified to assist the designer in locating critical specifications. Fast computational methods for incremental error analysis are developed to provide quick response to the designer in an evolving design. The computational complexity of the incremental analysis is proved to be constant with respect to the number of arcs in the network, when assessing the effects of a change in the design. A method for computing the sensitivity of the resultant errors with respect to a tolerancing or a mating specification of interest is also developed. The computational complexity of the sensitivity analysis is proved to be constant with respect to the number of arcs and avoids the computation of partial derivatives.
Keywords/Search Tags:Tolerance, Product, Designer's intentions, Concurrent, Reasoning
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