| Electrical noise originates from the fact that electrical charge is not continuous but is carried in discrete amounts equal to the electron charge. Hence it represents a fundamental limit on the performance of electronic circuits and systems. With the explosive growth of the personal mobile communications market, noise analysis/simulation techniques for nonlinear electronic circuits and systems have become an essential part of the design process. Even though most of the signal processing is done in the digital domain, every wireless communication device has an analog front-end which usually is the bottleneck in the design of the whole system. The requirements for low power operation and higher levels of integration create new challenges in the design of the analog signal processing subsystems of these mobile communication devices. Shrinking dimensions, the push for lower voltage levels, and the use of CMOS technologies for high frequency analog signal processing make the effect of noise on the performance of these inherently nonlinear analog circuits more and more significant.;We present analysis, simulation and characterization techniques, and behavioral models for noise in nonlinear electronic circuits and systems. The problem is treated within the framework of, and using techniques from, the probabilistic theory of stochastic processes and stochastic differential systems. A novel time-domain algorithm for the simulation and complete second-order probabilistic characterization of the behavior of nonlinear electronic circuits in the presence of noise is proposed. With this algorithm, one can simulate a non-linear dynamic circuit with electrical noise sources and arbitrary large-signal excitations by directly calculating the correlation matrix of the state variables of the system which are represented by nonstationary stochastic processes. This method enables us to analyze transient and nonstationary noise phenomena since a steady-state condition for the circuit is not required. The noise simulation algorithm is a core tool which can be used to investigate, simulate, understand, and model various noise phenomena in nonlinear analog and mixed-signal circuits. We use the noise simulation algorithm to investigate, understand and model the phase noise/timing jitter phenomenon in oscillator circuits. We present a formal definition for phase noise and propose algorithms for its probabilistic characterization. A hierarchical behavioral specification and simulation methodology for the design of phase-locked loops used in clock generation and frequency synthesis applications is then proposed. We develop behavioral models of phase-locked loop components which capture various nonidealities including the phase noise/timing jitter and spurious tone behavior. A mixed-signal behavioral simulation algorithm and techniques to postprocess the data from behavioral simulation to characterize the spurious tones and the timing jitter/phase noise of the output of the phase-locked loop are presented. |
