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Analog building blocks for implementing an adaptive algorithm for resistive grid applications

Posted on:2000-04-28Degree:Ph.DType:Thesis
University:New Mexico State UniversityCandidate:Carneiro, Noel Carlos FaleiroFull Text:PDF
GTID:2468390014963659Subject:Electrical engineering
Abstract/Summary:
In recent years, CMOS image sensors have grown in popularity due to their smaller size, very low power consumption and the potential opportunity to integrate a significant amount of VLSI electronics on-chip. The result is reduced component and packaging costs.;On the other hand, the analog approach for solving partial differential equations (PDEs) is very fast and has been shown a useful tool in studying field problems with specific boundary conditions since the 1950s. Recently, analog computation gained attention by the fact that many types of problems usually do not require high precision and, compared with high-speed digital systems, can reduce the time, power consumption and weight of finding the solution. With the recent improvement in integrated circuit technology, it is now feasible to implement these types of systems in a single chip.;To date, most of the research done in hardware implementations for image processing has been focused in improvements at the focal plane level, where the main purpose is to design photoreceptors and readout circuits that reduce the amount of transmitted data; the implementations for solving PDEs still lack flexibility of weight self-programming, as is common to software packages, requiring from the researcher previous knowledge of the field being investigated.;In this thesis, we report an approach that allows one to overcome the accuracy limitations imposed by a fixed-weight resistive grid by implementing a real-time adaptive algorithm for resistive grid applications.;The algorithm makes use of a smart cell as its basic building element. From a mathematical point of view, the adaptive programmability of the cell will produce an improved resolution or accuracy in resistive grid applications.;From a functional point of view, the basic proposed smart cell can be used in a wide range of practical problems with little modifications.;This work describes the design, analysis, post-layout simulations and experimental results for characterization of these building blocks. Filling the gap of self-programmability, the interface weights, which are simulated by MOS transistors, are self-adjusting according to the field or image characteristics. Furthermore, unlike previous work, the proposed smart cell does not need any external or prior adjustment.
Keywords/Search Tags:Resistive grid, Smart cell, Image, Analog, Building, Adaptive, Algorithm
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