| Post solder surface mount defect occurrence during the manufacture of printed circuit boards can affect the reliability and performance of products assembled with these boards. These defects can occur at several locations on a printed circuit board including the solder joint, between soldered joints, and on the printed circuit board substrate.; Investigation of automated post solder defect inspection has been carried out since 1982. However, most investigators have focused their research on plated through hole board defects. Consequently, several issues have been left unresolved on the automatic identification of post solder surface mount defects. These issues include; the identification of important surface mount solder defects, the development of 3-D invariant features for the representation of solder defects, a methodology of selecting optimal features for classifying solder defects, the improvement in classification efficiency of existing systems, the classification of simultaneously occurring defects, and the use of a solder defect model to assist in developing appropriate defect representation and classification schemes.; Several important issues are addressed in this research. Due to the magnitude of work involved in developing and testing a system on all post solder surface amount defects, the first stage of the thesis deals with the identification of critical defects. Other issues addressed by this research include the development of a classification approach for improving defect detection efficiency, the development of 3-D geometric models for representing defects to enable testing of the system, the development of a methodology to obtain the optimal set of features for identifying a given set of defects, and the use of a simulation model to determine an optimal feature set size that should be used in classifying new defects. |
