Efficient signal space detection for digital data storage channels

A systematic signal space partitioning method is proposed for detecting binary symbols in high density digital storage channels. The method systematically finds a required set of hyperplanes that partition the multi-dimensional signal space into different decision regions with which specific binary symbol values are associated. A logical function is also found analytically for making the final decision. This function maps the output values of the linear discriminant functions, which determine the relative location of the observation, into the estimated symbol value.; In the first part of this thesis, the performances of several detectors/modulation codes which are suitable for the helical scan digital tape channel are compared using bit-error-rate (BER) simulation. For the detection schemes, we consider conventional integrated detection, partial response (PR) equalization with Viterbi detection, decision feedback equalization (DFE) and fixed-delay tree search with decision feedback (FDTS/DF), which are used in conjunction with four different modulation codes. The digital tape channels are subject to various types of interferences as well as additive random noise, including head-tape space variation and offtrack interference. The theoretical analysis is done on the performance effect of channel mismatch due to head-tape space variations.; In the second part, a systematic signal space partitioning method is applied to reformulate FDTS detection, which has been shown to achieve near optimal performance in high density storage channels. The concept of the Voronoi diagram and its dual, Delaunay tessellation, is applied to the initial partitioning of the signal space. The procedure for finding redundant hyperplanes is also discussed. The detailed construction procedures are discussed with illustrative examples taken from high density channels. Two different types of signal space detection schemes capable of detecting a block of symbols in each cycle are also discussed. These techniques are suitable for high speed applications. One technique adopts block processing using multi-class detection. The other relies on parallel processing of several binary detectors.