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A two-stage gate drive scheme for snubberless operation of power MOSFETs and IGBTs

Posted on:2002-08-30Degree:M.ScType:Thesis
University:University of Calgary (Canada)Candidate:Sachdeva, RishiFull Text:PDF
GTID:2468390011493761Subject:Engineering
Abstract/Summary:
A central issue in reducing the size and cost of power converters is the control of transistor voltage and current transients during the switching process. Load side snubbers and clamps are bulky and expensive. Increasing the gate resistors values is inexpensive and simple but switching times as well as power losses are increased. A gate drive scheme is investigated which realizes low-noise, snubberless operation of power MOSFETs and IGBTs without an excessive increase in switching losses or switching times. A novel gate driver is presented which uses only a few extra low-voltage components. Experimental results are presented for both a power MOSFET and an IGBT in a hard-switching application. It is shown that the proposed driver scheme obtains an acceptable compromise between switching speed, power dissipation and electromagnetic interferences (EMI).
Keywords/Search Tags:Gate drive scheme, Power mosfets and igbts, Snubberless operation, Switching
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