| Processor speeds continue to increase rapidly due to the scaling of CMOS line-widths, but electrical interconnect speeds have not grown at the same rate. The loss mechanisms in electrical interconnects limit their ultimate capacity. Optical interconnects have the potential to alleviate this interconnect bottleneck. At short scales such as board-to-board, chip-to-chip, and on-chip, the important requirements for these optical interconnects are low latency, high throughput, high density, high bandwidth, and simple integration with mainstream silicon technology. This thesis investigates optical interconnects designed to meet these requirements using short pulses, in conjunction with multiple quantum well (MQW) diodes filp-chip bonded to silicon CMOS chips.; The use of short optical pulses (100 fs to a few ps), equivalent to a return-to-zero (RZ) format with very low duty cycle, has many potential advantages. We show that using short pulses in optical links can, (a) enhance the sensitivity of the receiver; (b) remove skew and jitter from an array of transmitters (modulators); (c) deliver a precise clock signal; (d) reduce the latency of the receiver; and (e) enable wavelength division multiplexing. Furthermore, the sensitivity of the receivers can be enhanced by 3 dB or more by using short pulses, which improves the overall system power budget. The latency of trans-impedance and integrating receivers can be reduced by greater than 60%, which might make global on-chip optical interconnects feasible. The latency can be even further reduced by using a totem-pole diode pair without amplification at the expense of optical power. All these benefits are investigated through simulations and a series of experimental demonstrations. |
