| Embedded capacitor technology, where thin film capacitors are integrated at on-chip and/or off-chip levels, offers high packaging densities and improved electrical performance at potentially reduced costs of capacitor fabrication and integration. This research explores and establishes the leverages of using thin film embedded capacitors over currently used surface mount discrete capacitors. In particular, this thesis focuses on developing pulsed dc reactively sputtered tantalum oxide (Ta2O5) thin film capacitors to be integrated into established interconnect technologies of IC chips and packages.; A correlation between electrical breakdown field and dielectric constant, EBR (MV/cm) = (20/) is empirically determined and used to establish a design space for breakdown voltage and capacitance density of planar capacitors, with film thickness and material dielectric constant as parameters. This design space sets the limits for “best one can achieve” (BOCA) breakdown voltages and capacitance densities using a particular dielectric. The validity of the developed design space is experimentally verified with Ta2O 5 thin films over a wide range of film thickness (0.05 to 5.4 μm).; High frequency test vehicles were designed and fabricated to evaluate the electrical performance of Ta2O5, SiO 2, and Si3N4 thin film capacitors over a wide range of frequencies (dc to 20 GHz). Ta2O5, SiO 2, and Si3N4 show no dispersion at least up to 20 GHz. The total inductance of power connect vias is determined to be less than 50 pH/μm of via, which is at least two orders of magnitude lower than most discrete capacitors along with connection leads (>4 nH).; The extent of Cu diffusion/drift into Ta2O5 films is determined and compared with Al, Ta, and Ti at various biasing and temperature conditions using bias-temperature-stress (BTS) and triangular voltage sweep (TVS) techniques. No Cu diffusion was detected at 150°C at least till 0.75 MV/cm. (Abstract shortened by UMI.)... |