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System-level modeling and circuit design for low voltage CMOS equalizer for coaxial cable for video application

Posted on:2014-01-06Degree:M.SType:Thesis
University:San Jose State UniversityCandidate:Zhang, HanFull Text:PDF
GTID:2458390005984836Subject:Engineering
Abstract/Summary:
A new method of modeling coaxial cable frequency response with genetic algorithm was introduced. A system-level multi-stages adaptive equalizer model with QFB block was generated and tested with multiple cable models, pathological PRBS-23 data with data rate 1.5 GHz was used. This thesis also provided analysis of influences on output by using different parameters in simulations. Two adaptive equalizer circuits with different pre-amplifiers were implemented in GPDK 45 nm CMOS technology. Related simulations about adaptive ability, single stage compensation ability, and cascade stages compensation ability were completed. A tradeoff between output eye height and peak-to-peak jitter was discussed based on different simulations. Future work will be digital control circuit implementation, entire circuit fabrication, and testing.
Keywords/Search Tags:Circuit, Equalizer, Cable
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