| Nonlinearities and memory effects of power amplifiers (PA) in RF base stations distort signals in the bandwidth of wireless broadband modern communication systems. Among the linearization methods developed over the past two decades, digital predistortion (DPD) is becoming more and more important because it provides more stability and flexibility. Digital predistortion's popularity results from the computing power increases of systems with ASIC, DSP and FPGA chips. DSP chips are progressively replaced by FPGA chip because they are parallel and highly flexible in programming. The challenges of hardware implantation of any DPD technique reside in achieving the real-time processing while preserving the performance obtained with software models such as Matlab/Simulink software. Xilinx System Generator (XSG) is a high-level tool that uses Matlab/Simulink environment to program Xilinx FPGA chip. During co-simulating in XSG tool, code is executed on FPGA chip but data can be exchanged with Matlab software. The proposed architectures are used in the PA behavioral modeling before being applied to linearize them by digital predistortion. The real-valued time-delay neural network (RVTDNN) based on multi-layer perception (MLP), with time delay layers (TDL) is developed and compared with real-valued recurrent neural network (RVRNN) and nonlinear autoregressive with exogenous inputs (NARX) on which are added TDL layer at inputs and outputs. Optimizing maximum operating frequency (MOF) up to 156.128 MHz in pipelining architecture allowed their FPGA implantation by JTAG Hardware Co-simulation. In addition, a modulated 16-QAM baseband test signal, with 1.35 MHz bandwidth, is. used to validate the results. NARX-8-pse network corrects is other digital predistortion architectures in EVM parameter because it has 0.505 % in EVM parameter and it is better ACPR parameter on left (18.440 dB (decibels)) and on right (18.223 dB) reductions relative to Wiener PA model. |
