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High dielectric constant oxides on III-V complementary metal-oxide-semiconductors

Posted on:2013-10-02Degree:M.SType:Thesis
University:University of California, Santa BarbaraCandidate:Chobpattana, VaristhaFull Text:PDF
GTID:2451390008471342Subject:Engineering
Abstract/Summary:
Suitable gate dielectrics are needed for III-V channel metal-oxide-semiconductor field-effect transistors (MOSFETs). III-V semiconductor surfaces tend to have high interface trap state density (Dit). High quality gate dielectrics require a high dielectric constant, a stable interface, and low Dit. The major challenges are scaling down the dielectric to achieve high capacitance densities, understanding defects at the oxide/semiconductor interface, and developing techniques to passivate Dit at the interface. By using nitrogen plasma pre-treatment passivation technique, MOSCAPs with ALD HfO 2 directly on InGaAs as high-k gate stack, with accumulation capacitance density 2.4 mu F/cm2 (EOT=0.6 nm) and 2.5 x 10 12 cm2 eV-1 midgap Dit have been achieved.
Keywords/Search Tags:III-V, Dielectric, Interface, Dit
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