CMOS VLSI design of a Bluetooth(TM) receiver front-end: Performance evaluation via ADS(TM)-based simulations

The research addressed and deliberated in this thesis refers to CMOS VLSI design approach of a Bluetooth(TM) receiver front-end. The performance outcome of the design is verified with ADS(TM) RF simulation tool. Essentially the thesis offers an outline on the Bluetooth(TM) technology and its RF front-end component requirements. The relevant specifications of the designed front-end blocks are identified and are in concurrence with CMOS technology based topologies.; For each block identified, both circuit parameters and device characteristics are chosen as per available design formulations and empirical results in open literature. Specifically, the topology sections designed include antenna input matching, transmit/receive switch, necessary filters, low noise amplifier, mixer and phase lock loop units. The numerical (designed) circuit parameters are duly addressed in appropriate ADS(TM) simulation tools and performance evaluations are conducted. Observed results including any deviations are identified and reported. The thesis concludes with a summary and indicates direction for future work.