| Digital Visual Interface (DVI) is gradually being applied to high quality and high resolution digital video signal transfer between graphic controller and digital display. There have been widespread applications of DVI interface. The valuable digital content, however, is vulnerable to unauthorized access during the transmission. Image /video protection become serious issues in current data transmission. The software implementation in image encryption is more competitive in flexibility and portability but may not meet some timing constraints. DVI transmission is real-time and has high-speed demand, hardware implementation of HDCP encryption is presented here and operate on a partial frame.;HDCP served as stream cipher is used to protect the signal from illegal copying or propagating specifically through DVI. My design work is to perform HDCP encryption/decryption on a partial frame in real-time transmission. The selected area is defined by some special pixels. Unauthorized receiver without keys can not access to the legible content in selected area of image/video. In this way, the owner of content could prevent illegal copy or eavesdrop by perform encryption on defined area.;This thesis presents research into a high speed FPGA implementation of HDCP Encryption and Decryption on partial frame. The application works in the following manner. The image is to be encrypted in software using Matlab and transferred to the FPGA, and then encrypted image will be decrypted in hardware in that machine. The target of this thesis is to demonstrate the feasibility of HDCP encryption/decryption on partial frame in PC through DVI interface and make performance comparison between hardware and software implementation.;Our work-steps includes Paper Designing, Writing VHDL Code, Simulating the code on " ModelSim XE 6.4b ", Synthesizing & Implementing (i.e. Translate, Map & Place and Route) the code on "Xilinx - Project Navigator, ISE 11 " with Chip XC3SD3400A of Spartan-3A DSP 3400A & XST Synthesis Tool. |
