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Research And Implementation Of DBF Algorithm For Large Array Nulling And Dimensionality Reduction

Posted on:2020-03-02Degree:MasterType:Thesis
Country:ChinaCandidate:A S ShenFull Text:PDF
GTID:2438330626953207Subject:Electromagnetic field and microwave technology
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With the ability to form nulls adaptively at the interference directions,control antenna pattern flexibly and form multi-beams simultaneously,adaptive digital beamforming technology starts to be widely used in radar,sonar,mobile communication and other fields.However,there are still some challenges for the practical application of ADBF algorithm on large-scale digital arrays,such as large computational complexity and poor robustness against fast maneuvering interference.In this dissertation,research and hardware implementation of fast and robust adaptive digital beamforming algorithm are achiveed according to the development of digital array radar with triangular grid structure of 172 elements.Then we jointly set up the digital array system and made initial debugging test on it.Major work of this paper is shown below:1.Aiming at the challenges of large computational complexity and poor robustness against fast maneuvering interference for practical application of ADBF algotithm in large-scale digital array,a high-efficiency dimension-reduced ADBF algotihm with widened nulls is proposed.Combined with the actual system,the implementation scheme of the algorithm is given,as well as the detailed performance simulation.2.3U VPX hardware architecture based on VITA46 standard is adopted in combination with practical requirements of large-scale digitial arrays,and a modular,standard and extensible scheme of the system is proposed.Then the system and the modules of the system are developed,especially the interconnection structure and the DBF processor moudule are described in detail,including the schematic design,PCB design of DBF FPGA board,DBF DSP board and the SRIO switch bridge board.3.The realization of adaptive digital beamforming algorithm on FPGA and DSP hardware platform is completed according to the workflow of digital array radar,including the division of tasks between FPGA and DSP processor and the design of software program.The integration of the DBF processor in whole digital array radar system and preliminary test are also completed,verifying the correctness and validity of the adaptive digital beamforming algorithm and the related hardware and software design.
Keywords/Search Tags:Digital array radar, Subarray adaptive processing, Nulls broadening, VITA46 standard VPX architecture
PDF Full Text Request
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