Design And Implementation Of Two Digital Direct-spread Communication Systems

Direct sequence spread spectrum(DSSS)is a common communication technology,which can be used in combination with different digital modulation techniques(such as BPSK and QAM).Low-Density Parity-check code,as one of the most popular channel code nowadays,how to effectively combine it with DSSS technology and integrate it into different digital modulation systems is one of the important research directions in digital communication.In this paper,algorithm design and hardware implementation for BPSK and16 QAM digital DSSS communication systems are presented.(1)In this paper,the design and implementation principle of modulation terminal in BPSK,16 QAM DSSS systems are presented.Both systems adopt a DSSS scheme with spread spectrum gain of 15 dB.In BPSK DSSS system,frequency offset acquisition is accomplished by frequency offset estimation algorithm based on FFT,and phase tracking is completed by Costas loop.In 16 QAMK DSSS system,the frequency offset acquisition is accomplished by the frequency offset estimation algorithm based on L&W,and the phase tracking is completed by the loop based on rotation.(2)The design and implementation principle of receiver carrier synchronization in two DSSS systems are presented.The acquisition of pseudo-code phase in time domain is accomplished by digital matched filter.(3)The LDPC coding and decoding theory is studied,and the normalized min-sum algorithm with coefficient of 0.75 is used to implement the(7)360,540(8)LDPC decoder with a code rate of 2/3.(4)The soft information calculation method for the LDPC decoder in the differential BPSK system is proposed,which can overcome the phase abrupt problem encountered in the case of a small frequency offset.At the same time,the soft information calculation method in the 16 QAM system is given by the 16 QAM constellation mapping rule.(5)The BPSK DSSS communication system based on the symbol rate of 1.25 MHz and the spread spectrum code rate of 40 MHz has been successfully implemented on the FPGA hardware platform,it's also meeting the technical requirements of the project.