Design And Implementation Of Hardware For Micro SAR Real-time Imaging System

With the continuous development and innovation of synthetic aperture radar(SAR)technology,there is high application value about SAR radar in a variety of fields such as military,agriculture,environmental monitoring and mapping.In recent years,the research on the application technology of large-bandwidth SAR radar system has become one of the research hotspots in the current scientific field.In the principle of synthetic aperture imaging,the radar transmitting bandwidth is proportional to the resolution,and therefore the enhancement of SAR transmitting signal bandwidth improves the imaging resolution.In this thesis,a real-time imaging radar system for miniature LFM pulse system SAR is developed.Its transmitting bandwidth is 500 MHz,which is characterized by light weight,small size,fast imaging processing and high imaging resolution.The system is mainly used for loading on small unmanned aerial vehicles(UAV),which can achieve high resolution real-time imaging of large ground scene.It is of great use value in security field.This thesis focuses on the hardware design method of real-time imaging system of miniature SAR,and describes the development of a set of LFM pulse SAR radar based on FPGA+POWERPC architecture.This thesis mainly includes the following contents:In this thesis,the theory of LFM wave radar is discussed and the main parameters of real-time imaging system of miniature SAR are analyzed.A design structure of dualcoherent source with adjustable relative delay is proposed and,therefore,system can be flexibly applied to image objects with different distances and different scene sizes.At the radar signal transmitting end,DDS+DAC structure is finally selected as the implementation scheme of LFM signal source through the comparison of different design schemes of signal sources.In this thesis,a DDS LFM signal source system with double sampling rate is designed on FPGA platform to solve the problem of limited working frequency of single DDS.FPGA is designed to monitor the working status register of AD9783 of special DAC chip in real time,and the some IP cores and primitive provided by Xilinx such as MMCM and OSERDESE2 are used for data serialization conversion,realizing the steady transmission of LFM data between FPGA and AD9783.At the radar signal transmitting end,the system adopts two design schemes of LFM signal source: one is a structure of DDS+DAC which can produce narrow-bandwidth baseband signal.In this scheme,a DDS LFM signal source system with double sampling rate is designed on FPGA platform to solve the problem of limited working frequency of single DDS.The other is to use a specific DDS chip AD9914 to generate baseband LFM signal with 500 MHz bandwidth.In this scheme,a control circuit module of AD9914 is designed on the FPGA platform,through the AD9914 parameter configuration to achieve LFM sweep.At the receiving end of,according to DDC digital down-conversion theory,a CORDIC rotating quadrater mixer and a 10-stage Half-band filter extraction structure are designed in this thesis.The design of the quadrater mixer based on CORDIC rotation avoids the complicated multiplication operation on FPGA platform,while the 10-stage Half-band filter extraction structure enables the system to flexibly select the data stream matching rate according to the echo signal bandwidth.Finally,the real-time imaging system of the whole miniature SAR was tested,and the spectrum linearity,point target range detection and target imaging of LFM signal were verified.