Research On Work In Process Level Control Of Semiconductor Production Line Based On Variability

With the transformation of manufacturing industry from large-scale production mode to intelligent manufacturing mode,the production life-cycle time of products is shorter and shorter,and the market demand for various products is also larger and larger.Under the short cycle and large demand,the production system is more and more complex,and the uncertainty factors in the production process are more and more.In order to solve the uncertainty in the production process and prevent the chain effect of sudden equipment failure or random supply interruption,some in-process inventory is usually kept in the production process,but the excessive quantity of in-process inventory leads to a longer production cycle,while the demanders of semiconductors need a shorter delivery period.Therefore,in the semiconductor production line,it is necessary to maintain a reasonable level of work in progress while ensuring the production rate.Based on the National Natural Science Foundation Project "Research on performance prediction and optimization method of semiconductor manufacturing system based on variability"(Grant No.71671026),this thesis takes the semiconductor chip packaging test production line as the research object to optimize the level of work in progress of the whole production line.Firstly,according to the constraint theory,the importance of bottleneck identification is analyzed,and a comprehensive Bottleneck Identification index system is established by using multiple indexes applicable to the research object.Based on the comprehensive Bottleneck Identification index system,TOPSIS method is used to calculate the bottleneck degree.After the establishment of bottleneck identification scheme,take a semiconductor packaging test line as an example to practice,obtain the original processing data,get the value of each index,establish the initial decision matrix,calculate the bottleneck degree of each work station,find the bottleneck work station,and verify the accuracy of bottle neck identification through Arena simulation.Because the bottleneck of the production line is not unchangeable,the phenomenon of bottleneck drift will appear with the operation of the production line.This thesis analyzes the factors that cause the bottleneck drift,quantifies the variable factors that affect the bottleneck drift,calculates the bottleneck identification index again on the basis of the variable quantification,and constructs the bottleneck drift prediction model.Taking the semiconductor packaging test line as an example,the historical downtime data is obtained,the processing variability and flow variability results of each work station are calculated,and the availability of the variability measurement model is verified by arena simulation,and the bottleneck identification index and bottleneck degree under the influence of variability factors are solved,and the drifting bottleneck work station is predicted.On the basis of the previous bottleneck stations have been found out,an optimal batch segmentation model is established,which is constrained by the minimum non value added time between adjacent stations and the minimum bottleneck gap between adjacent stations,so that the production rhythm between stations is similar and the accumulation of work in progress is avoided.After the establishment of the batch segmentation model,the model is applied to the semiconductor chip packaging test production line,and the horizontal distribution of WIP and WIP after the batch segmentation under the traditional mode is analyzed,and the results of optimization of WIP level distribution in each work station of the production line after the batch segmentation are obtained,and the availability and optimization effect of the model are verified by arena simulation.