Research On Parallel Selection Of Extensible Processor Custom Instructions

Implementing custom instructions in an extensible processor has become one of the most common ways to improve the efficiency of an application.Custom instruction recognition consists of four steps: intermediate representation generation,custom instruction enumeration,custom instruction selection,and code generation.The custom instruction selection problem is a complex problem involved in the design process of the dedicated instruction set processor.In order to solve the long design cycle of the existing identification custom instruction method,most of the existing research is to use a serial algorithm to solve the custom instruction selection problem on a single computing node,while satisfying the embedded application for high performance and low power consumption.The need for a custom instruction parallel selection method for scalable processors is proposed.For the high computational complexity of the custom instruction selection problem,the efficient parallel method based on depth map segmentation is first used to select the custom instruction.According to the proposed runtime prediction model,the initial problem is divided into several sub-problems with similar complexity.Secondly,the sub-question is solved by the slave node using the branch and bound algorithm to ensure the load balance between the computing nodes.The experimental results show that the proposed parallel instruction selection method is better than the parallel method using the multi-sub problem segmentation method and the parallel method of one-time segmentation method,which can achieve the goal of approximate linear acceleration.This paper has 23 figures,8 tables and 63 references.