| Custom instructions can be implemented in extensible processors,which has become one of the common methods to improve the efficiency of application programs.In order to solve the problem that the existing custom instructions identification methods have long design cycle,and satisfy the increasing demand for high performance and low power consumption of embedded applications,an automatic custom instructions identification method for extensible processors is proposed.This method implements a fully automated compilation process,so as to provide a universal way to automatically identify custom instructions for extensible processors.Firstly,source code is transformed into a control data flow graph,so that achieve the source code preprocessing;Secondly,a subgraph enumeration algorithm is used to enumerate all the connected convex subgraphs in a bottom-up manner from data flow graph based on control data flow graph.The node deletion technique used in the subgraph enumeration algorithm can effectively avoid generating redundant subgraphs.At the same time,this algorithm improves the user's ability to flexibly modify the constraints;Then,from the perspectives of performance,area and code size,subgraph selection algorithms are used to select partial optimal subgraphs as the final custom instructions;Finally,a new code is regenerated by incorporating the selected custom instructions as extensible processors input.The subgraph enumeration algorithm and subgraph selection algorithms of this paper are verified by using seven test benchmark programs with rich arithmetic and logical operations.Experimental results show that the efficiency of the subgraph enumeration algorithm is better than the TD and CMS algorithms.In this paper,the critical paths based subgraph selection,frequency of occurrence based pattern selection and minimum number of matches based subgraph selection have certain advantages in improving performance,reusing hardware resources and reducing code size respectively. |
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