Design Of Current And Voltage Programmalbe Power Management Unit

With the explosive growth of various mobile terminals,wearable devices,smart homes and etc.,research on power management unit(PMU)has become more and more abundant.Currently it's focused on the performance improvement,such as response rate,conversion efficiency and power consumption.However,the traditional PMU is not suitable for high-speed serialization/deserialization system due to severe load changes.In order to solve this problem,this thesis proposes a new power management unit,which consists of low drop-out regulator,bandgap and other functional modules.The high performance PMU can automatically match different voltage current amplitudes according to the load.The proposed low drop-out regulator adopts a two-stage master-slave structure.The resistor array and the current branch array make the current and voltage programmable.At the same time,the adaptive algorithm can automatically match the load.The designed bandgap voltage reference refers to the industry standard,and the output accuracy is up to 1.3%.It can tolerate additional 30 mV offset voltage in addition to system and process deviations,achieving industrial reliability requirements.Two functional modules,the constant current circuit and the power-on reset circuit,are added to the design to provide the necessary constant current for the system,while strictly regulating the power-on order to meet the complex requirements of the high-speed dual-mode SerDes system.In the end,all the design,simulation and layout work are completed using the GF 22 nm SOI process.Now the chip is under tape-out.It can be seen from the simulations results that the output voltage ripple can be limited to 15 mV with and on-chip capacitor.The PSRR is up to 40 dB and the digital calibration part can be locked in different states depending on load changes.