Design And Implementation Of IP-based Convolutional Neural Network Based On FPGA

Research in the field of artificial intelligence includes multiple directions such as face recognition and object detection,and is widely used in various industries.More and more people enjoy the convenience brought by artificial intelligence.The convolutional neural network,which plays an important role in artificial intelligence and machine learning,has become a current research hotspot.Convolutional neural network algorithms are generally implemented on CPU and GPU,through the network construction to train the target,extract key information.However,due to the relatively large size and high power consumption of general-purpose processors,it is difficult to deploy convolutional neural networks to meet the needs of edge computing.Field programmable gate array(Field Programmable Gate Array,FPGA)has the characteristics of rich programming logic resources,flexible and configurable,low power consumption,etc.,can realize the parallel calculation of convolutional neural network,is an important transplantation of convolutional neural network operation One of the hardware platforms.This paper studies the IP-based design and implementation of FPGA-based convolutional neural network.Combining the characteristics of FPGA,the calculation of convolutional layer and pooling layer in convolutional neural network is studied in parallel.Activation function.On this basis,in order to realize the simple and convenient transplantation of the convolutional neural network to the FPGA side,it is proposed to design the IP of each layer of the convolutional neural network to reduce the difficulty of the network to the FPGA side.The main research contents are as follows:(1)MY-NET network is constructed.Based on the improvement of the traditional digital handwriting recognition network MNIST,the MY-NET network was redesigned and trained.Using the same training set,in the case of the same training times,because MY-NET has a more complex network structure and more parameters,the recognition rate of MY-NET network compared with MNIST network has been further improved.(2)A parallel design is adopted for internal calculation of convolutional neural network.The calculation part of each layer of convolutional neural network is studied.Since the convolution operations between different convolution kernels and input feature maps are independent of each other,and different input feature maps are also independent of each other when performing pooling operations,the two parts of the operations are designed in parallel.Through the parallel design of the calculations in the convolutional layer and the pooling layer,the calculation performance of theconvolutional neural network after being transplanted to the FPGA side is improved.(3)IP design of each layer of convolutional neural network.Because of its universal design,not only can the structure of the transplanted system be simplified by multiplexing when the entire convolutional neural network is transplanted,but also can be directly recalled when transplanting different convolutional neural networks.By successfully implementing the MY-NET network and the MNIST network on the FPGA platform,it is proved that the IP-based design has the simplicity and efficiency of FPGA in the implementation of convolutional neural networks.It provides convenience for transplanting convolutional neural networks of different network structures to the FPGA side.