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Design And Implementation Of OFDM Video Transmission System Based On FPGA

Posted on:2021-04-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y LiFull Text:PDF
GTID:2428330614958336Subject:Electronic and communication engineering
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With the commercialization of 5G,the coordinated development of various fields such as artificial intelligence,cloud computing,and big data have opened an era of ubiquitously connected Internet of Things(Io T).In some Io T scenarios,embedded devices are required to transmit video signals.These scenarios include smart transportation,smart home,smart medical,etc.Due to the special needs of the video transmission service,physical layer,link layer and other layers are all studying how to deal with the problems caused by the explosive growth of video services.For the video transmission service of embedded devices,it is necessary to demodulate the information of the transmitter at the receiver in time.However,video transmission requires greater bandwidth.But the channel conditions are complex.Embedded devices have less hardware resources,and the power of the devices is smaller.Therefore,in this thesis we study the transmission characteristics of video services and set reasonable system parameters so that video information can be effectively sent and received in embedded scenarios.This thesis mainly includes the following four aspects:First,for the problem of complex video transmission channel conditions,orthogonal frequency division multiplexing technology(OFDM)as transmission method can effectively combat multipath interference.This thesis designs the transmission system framework,and introduces the key technologies in the OFDM transmission system,including timing synchronization,frequency synchronization,and channel equalization.Second,in order to solve the problem of lack of hardware resources in embedded devices,this thesis analyzes the timing synchronization algorithm,studies the hardware space-time efficiency of the classic algorithm.Since space-time efficiency can reflect the power consumption of hardware to a certain extent,this thesis proposes an optimization method to reduce the hardware space-time efficiency of the algorithm.This thesis uses two synchronizations when designing the synchronization method.Due to the two synchronizations,the algorithm performs well in extreme signal to noise ratio conditions in this thesis.This thesis first simplifies the timing function in coarse synchronization,and introduces a quantization function in fine synchronization,which will reduce the use of multipliers in the timing synchronization function,thereby reducing hardware overhead.In this thesis,the timing algorithm was simulated in MATLAB to verify the performance of the algorithm.The simulation results show that the method still has good synchronization performance when the signal-to-noise ratio is less than 0d B.At the same time,this thesis compares the hardware resource consumption with traditional algorithms,which can increase the hardware space-time efficiency by about 40%.Third,the system is simulated and analyzed in this thesis.The whole system can be divided into video processing part,OFDM modulation part and wireless transceiver part.The Modelsim simulation software verified that the OFDM modulation and demodulation part can work correctly;The video processing part adopts ping-pong buffer,which can effectively reduce the video freeze problem.In order to complete wireless sending and receiving,this thesis designs a parameter configuration and data transceiver interface control module.Through this module,the digital baseband signal generated by the FPGA is sent to the RF chip.The module can read back the working status of the RF chip through the PC serial port in time.Fourth,the bit error rate of the system was analyzed through MATLAB,and the hardware resource occupancy,timing and power consumption of the system were analyzed through the Xilinx ISE comprehensive tool.After comparing the analysis results with the project indicators,it met the project requirements.Finally,a complete hardware platform is built,and the signal on board is captured and analyzed by on-line logic analyzer.the results show that the FPGA internal signals are consistent with the simulation results and meets the design needs.
Keywords/Search Tags:video transmission, OFDM, timing synchronization, hardware optimization, Space-time efficiency
PDF Full Text Request
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