| With the gradual commercialization of The 5th Generation Mobile Communication(5G),the development of a 5G terminal simulator is of great significance for promoting the 5G commercial process.Orthogonal Frequency Division Multiplexing(OFDM)symbols are very sensitive to frequency offset,and the signal from the base station to the receiving end will be affected by complex wireless channels,and the Physical Downlink Shared Channel(PDSCH)Transmit data information,so frequency offset estimation and PDSCH channel estimation are of great significance to the performance improvement of 5G terminal simulators.Thesis relies on the special key technology innovation project of Chongqing's key industries.According to the 5G system protocol standard,the thesis focuses on the frequency offset estimation algorithm and channel estimation algorithm.Design downlink frequency offset estimation scheme and PDSCH channel estimation scheme based on existing algorithms and subject requirements,and design and verify the Field Programmable Gate Array(FPGA)program.The main content of the thesis is as follows:First,according to the protocol standards,the characteristics and key technologies of the 5G physical layer are studied,The thesis analyzes the requirement of the 5G terminal simulator,and on this basis,introduces the overall architecture of the 5G terminal emulator and the design of the baseband board architecture.Secondly,the influence of frequency offset on 5G system and the frequency offset estimation algorithm based on Cyclic Prefix(CP)are analyzed.Based on the frequency offset estimation algorithm of synchronization signal,the Primary Synchronization Signal(PSS)and Secondary Synchronization Signal(SSS)joint frequency offset estimation scheme is designed,the frequency offset estimation range is expanded to [-7007 Hz,7007Hz] when the subcarrier interval is 30 k Hz,and the frequency offset estimation range is expanded to [-3504 Hz,3504Hz] when the subcarrier interval is 15 k Hz.Based on the study of the 5G PDSCH channel estimation algorithm,a channel estimation scheme is designed according to the characteristics of the 5G system.The scheme uses the Least Squares(LS)algorithm for reference signal position estimation and frequency domain interpolation uses Linear Minimum Mean Squared Error(LMMSE)sliding interpolation algorithm based on Signal-to-Noise Ratio(SNR),and the last time domain uses linear interpolation algorithm.Then,in this thesis according to the proposed algorithm,follow the top-down and modular ideas to design FPGA implementation scheme for downlink frequency offset estimation and PDSCH channel estimation scheme.Based on the 5G terminal simulator baseband board architecture,Verilog language is used for FPGA implementation of frequency offset estimation and PDSCH estimation module.Finally,the thesis tests and validates each module of frequency offset estimation and PDSCH channel estimation.The comparison test verifies the correctness of the module,and analyzes the resource occupation to verify the rationality of the implementation plan. |
