Study Of Avalanche Photodetector For Visible Light Communication

In recent years,the rapid development of visible light communication(VLC)technology has increased its application attention.VLC is a technology that uses visible light as an information carrier and can directly transmit optical signals in the air and complete photoelectric conversion at the receiving end.The visible light communication speed can reach hundreds of trillions per second,and has a very broad application prospect.Compared with similar RF products,VLC transceivers have better resistance to electromagnetic interference(EMI),can provide secure communication in a closed environment,and achieve license-free operation in the visible spectrum(450-650 nm).Because of the high path loss in the transmission of the VLC system,the power of the light-receiving signal at its receiving end is low,so a highly responsive photodetector is required.Low-noise,high-bandwidth CMOS(Complementary Metal Oxide Semiconductor)APD(Avalanche Photodiode)is used as the semiconductor photodetector,which can reduce the signal-to-noise ratio and bit error probability of the entire system.This thesis designs a CMOS APD structure for visible light communication by standard 0.18?m CMOS process.The basic structure of the device is N+/P-well single window.The photo-generated electron carriers in the P-well drift to the N+ layer,which mainly uses the faster drift speed of itself than the photo-generated hole carriers to shorten the carrier transit time,and thus can improve the device bandwidth performance.At the same time,a shallow trench isolation(STI)guard ring structure is designed on both sides of the PN junction in the APD device.Its function is to eliminate the photogenerated carriers diffused in the substrate to ensure high bandwidth.Under the operating voltage of-12 V,the device has the characteristics of high bandwidth and easy integration with electronic circuits,but it has the disadvantages of low frequency bandwidth and unstable gain.Secondly,this thesis optimizes the device structure and related process parameters.Specific improvements were made in the following aspects: First,by changing the originally designed single-light window structure into a double-window structure,the increase in the size of the light window increased the effective light-receiving area of the device and improved the receiving sensitivity of the device.Then,the STI guard ring outside the PN junction is retained,and the STI guard ring structure between P+ and N+ is removed,thereby improving the photocurrent in the avalanche layer and reducing the value of the avalanche breakdown voltage.Finally,adjust the concentration of + and P-well to increase the thickness of the depletion layer,increase the setting of deep N-well,and short-circuit the slow diffusion carriers of P-well and P-substrate to avoid jitter and bandwidth reduction in the low-frequency part of the bandwidth.The above method effectively improves the overall photodetection performance of the device.Simulation analysis of the optimized CMOS APD shows that the avalanche breakdown voltage of the CMOS APD is significantly increased.The avalanche breakdown voltage of the initial device structure was increased from-12 V to-9.9 V.Under the incident light of 0.01 W/cm2,the responsivity of the device reached a peak of 1.2 A/W at 600 nm,and the responsivity in the visible wavelength range was higher than the responsivity before optimization of 0.7 A/W.At the working wavelength of 600 nm,there is no jitter in the low frequency bandwidth,the maximum bandwidth is 8.4 GHz,and the 3d B bandwidth is 5.9 GHz.The gain and additional noise factor at this operating wavelength are 10 and 2.5,respectively.Compared with the gain before optimization,the excess noise factor is reduced.