Research On Topology Mapping Method Of High Performance Computers

High performance computing(HPC)plays a vital role in the fields of scientific research and engineering technology,such as aerospace,astrophysics,biomedicine,weather,materials science,and nuclear engineering.With the increasing of computing power,the huge scale of systems and the great complexity of applications have brought new challenges to the efficient inter-process communication.However,default strategies of mapping application processes onto processors usually ignore the underlying network topology,and the distance spanned by communication messages may be particularly far.Since each traversal of a switch increases the message latency,the communication between processes could cause heavy congestion within the interconnection network.Topology-aware mapping has been validated as an effective solution for improving the communication performance of parallel applications on large-scale systems.Especially,an optimized mapping of processes onto idle compute resources enables to improve the data locality.For instance,a suitable mapping allows communicating peers to be placed on the processors which are physically close to each other,such that the main communication takes place within the compute node or compute frame,and the communication efficiency can be improved.In this paper,we contribute towards the goal of optimizing the communication performance on HPC systems,and the main contributions are as follows:1 ? Modeling of the communication pattern of typical large scale parallel applications.To optimize the communication overhead of large-scale parallel application,we need to model the pattern of the application to understand the communication of each process.In the modeling process,we comprehensively consider the influence of communication type and message size on the communication performance,and propose the communication pattern matrix as the basis of mapping communication process.It provides the basis for subsequent topology mapping algorithm and optimized performance.2?Modeling of network topology.With the increase scale of the high-performance computing system,the structure between nodes becomes very complex.By constructing the network physical matrix,the reasonable measurement of communication cost between processors in the high-performance computing system is realized.In particular,the modeling process takes into account the discontinuity of computing resources.3?Modeling of the communication performance.In order to measure different mapping schemes,this paper proposed the Costmetirc metric as the performance evaluation of the mapping.This model acts as a unified metric for comparison between different mapping methods,platforms,and large-scale parallel applications.4?A new two-step topological mapping method TAMM.Based on communication pattern matrix and physical topology matrix,we proposed a new topology mapping method called TAMM.The new method employs a two-step strategy to obtain an efficient mapping solution for various parallel applications.It first extracts an appropriate subset from all idle computing resources and constructs an initial one-to-one mapping solution.Then,it uses an improved iterative algorithm to optimize the initial mapping which further reduces the communication cost.Experimental results of four NPB programs and two scientific applications demonstrate that TAMM can effectively improve the communication performance of large-scale parallel applications on high-performance computers.