Research On SVPWM Algorithm Of PMSM Sensorless Control System Based On FPGA

With the continuous development of modern power electronics technology and permanent magnet materials,permanent magnet synchronous motors(PMSM)are currently widely used in various fields of the national economy.Because FPGA has the advantages of processing data in parallel,high flexibility,low power consumption,etc.,it is the general trend to choose FPGA to control PMSM.However,pulse width modulation(SVPWM)technology,as an important part of the PMSM control system,has complex formulas and a large number of trigonometric functions,which is very unfavorable to FPGA implementation.Based on the above problems,this paper first proposes an improved SVPWM algorithm that is easy to implement on FPGA,and implements this algorithm based on FPGA.This algorithm abandons the original method of using the voltage in a twophase stationary coordinates system to determine the sector where the composite vector are located and the adjacent vector's action time,and directly uses the size relationship between the three-phase voltages in the natural coordinates system to determine the sector.The three-phase voltage and the switching period are used to calculate the adjacent vector action time.Secondly,the traditional SVPWM algorithm and the improved SVPWM algorithm are simulated under the Simulink platform.In order to further verify the feasibility of the algorithm,a PMSM sensorless control system based on reference model adaptation(MARS)was built on the Simulink platform,and comparative simulation was performed under this system;a circuit design of an improved SVPWM algorithm was given The block diagram is implemented using Verilog HDL language and Modelsim simulation.The circuit includes a COS?ROOM module with a depth of 15 bits * 1024 depth,a ROM?CTR module,a serial-to-parallel output voltage SERAIL?PARALL module,and various subsequent logic calculation modules.Finally,other important modules in the control system are implemented based on FPGA,and the designed circuit block diagram is verified by hardware on the hardware platform.The simulation results of Simulink can prove that the proposed improved algorithm is correct and feasible.Modelsim simulation shows that compared with the implementation of traditional algorithms,the improved algorithm takes up 26% of the total number of logic elements and reduces resource consumption.In the comparison verification of the hardware platform,when the SVPWM module adopts an improved algorithm,the time for the motor to reach a stable state is reduced by about 0.2 s,and the entire system is stable,which proves that the designed circuit block diagram is feasible on the hardware platform.