Research On Multiple Feature Correlation Filter Tracking Technology

Target tracking,a popular topic in computer vision,has been widely applied in many aspects,such as military reconnaissance,precision guidance,fire strike,aotomatic pilot,etc.In recent years,many outstanding target tracking algorithms have been proposed.At the same time,related technologies and products derived from these algorithms are emerging one after another,and the tracking accuracy of the algorithms is getting higher and higher.However,the excellent performance of these algorithms is limited by the limitations of the test set,and is not suitable for realistic scenarios containing various complex interference factors,and computing platforms are generally high-performance and high-power computing chips such as GPU,CPU,etc.It is more difficult to deploy on embedded platforms with low computing power and low power consumption.This subject proposes a multi-feature target tracking algorithm that can deal with a variety of complex environments,high tracking accuracy,and fast running speed.At the same time,an embedded hardware system is designed to realize a real-time target tracking system.In this research,the software algorithm utilizes the huge influence of features on the performance of the algorithm,and proposes a target representation model that combines multiple image features.The algorithm builds a basic tracker with high-speed correlation filtering tracking algorithm,and then builds multiple trackers based on the integrated tracking idea to track the same target.Different trackers use different combinations of features,and select the one with the best tracking performance.Finally,an adaptive update strategy is used to update the tracking results.The algorithm is tested on the standard test set to verify the robustness and effectiveness of the algorithm.In terms of hardware platform,an embedded hardware system is designed and implemented with FPGA as the main control chip and DSP as the main processing chip.Among them,FPGA is the main controller,its main function is to control the image and instruction transmission between DSP and communicate with the outside through RS422 bus.DSP as the main processor,its main function is to realize the calculation of the target tracking algorithm,and carry out information interaction with the FPGA through the SRIO bus.In terms of algorithm transplantation optimization,a high-performance image function processing library,signal processing function library and matrix calculation function library adapted to DSP are designed and built,and the high-speed cache and storage resources of the computing unit are reasonably allocated.The bottom layer of the above function library is optimized by using the SIMD instruction set of C66 x,and on the basis of the above function library,the proposed target tracking algorithm is implemented in parallel in multiple threads.The target tracking system designed and implemented in this research has single target tracking,target scale detection update and some other auxiliary functions.Experiments show that both in the standard test set or in the actual test scenarios have a good performance,the upper and lower computers can achieve good communication interaction with the embedded hardware platform,the system can achieve real-time and stability in a variety of complex scenarios Target Tracking.