Analysis And Optimization Of AC Noise On PDN In 3D Integrated Circuit

In recent years,with the rapid development of integrated circuits,the transistor size is close to the physical limit,the reduction of process size has made it difficult to improve the integration of integrated circuits,and Moore's Law has gradually“failed”.However,the emergence of three-dimensional integration technology has brought hope to solve this problem.Today 3D integrated circuits are based on through-silicon via（TSV）and 3D integration technology,which stacks multi-layer planar chips to significantly increase chip integration and performance.However,three-dimensional integrated circuits have greater noise than two-dimensional integrated circuits.For example,a large amount of noise is generated on a power distribution network（PDN）during power transmission,resulting in power supply integrity problems and package reliability problems.In recent years,as the chip operating frequency has become higher and higher,the AC noise on the PDN in the three-dimensional integrated circuit has become a major factor affecting the reliability and power integrity of the chip.This paper establishes an equivalent model of PDN in 3D integrated circuits,which consists of TSV,Solder,VIA and P/G grids.In this paper,the method of segmentation and recombination is adopted.Firstly,the three-dimensional PDN is disassembled into four parts:TSV,Solder,VIA and P/G grid,and then the parasitic parameters are extracted by parasitic parameter extraction formula or software simulation.Finally,The physical structure reorganization establishes the equivalent model of the whole 3D-PDN,and the correctness of the model is verified by the Z parameter.Compared with the traditional model,the proposed model adds the influence of parasitic capacitance on the basis of considering the parasitic resistance and parasitic inductance of the P/G grid,and the influence of the ground wire is also taken into account.The verification results show that the equivalent model established in this paper is in good agreement with the S₁₁ curve of the reference model in the range of 0-10 GHz,and is more accurate than the traditional model without considering the P/G grid capacitance.According to the 3D-PDN equivalent model,the ADS software is used for transient simulation to obtain the AC noise on the PDN.The control method is used to comprehensively study the influence of layer number,scale,TSV's aspect ratio,TSV's number,TSV's distribution,distance between P/G grid,on-chip decoupling capacitor,chip operating frequency and power supply voltage on AC noise of the PDN,and provide the basis for the PDN optimization method proposed later.According to the model of 3D-PDN and the transient simulation analysis of ADS,this paper proposes a method to reduce the AC noise on PDN by TSV grouping,that is,to ensure TSV grouping under the condition of constant total cross-sectional area,and to use mathematical model.Calculations and circuit transient simulations demonstrate the effectiveness of the proposed method.It is proved by experiments that when a TSV group is two,four,or nine TSVs,the AC noise of the PDN can be reduced by up to 20%,43%and 57%.The physical structure of PDN is generally difficult to change,and the parameters of TSV are convenient to control.TSV grouping can effectively reduce the AC noise of PDN and improve the reliability of signal transmission.It is an effective and engineering method.