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Research On Wrapper Scan Chains Design And Test Planning For Embedded Cores Of NoC

Posted on:2020-01-27Degree:MasterType:Thesis
Country:ChinaCandidate:T ZhouFull Text:PDF
GTID:2428330599959802Subject:Instrumentation engineering
Abstract/Summary:PDF Full Text Request
Network-on-chip(NoC)is a system that transplanting computer network technology to the System-on-Chip(SoC),adopting distributed resource node schema,using packet switching and routing to accomplish the communication of resource nodes,and providing good parallel communication and processing capabilities.NoC has solved a series of problems caused by the SoC bus architecture,which is the development trend of next generation large scale integrated circuit.However,their functions became more complex as integrated IPs(intellectual property)on NoC is increasing,the testing of NoC is facing unprecedented challenges,and make it urgently to study effective testing techniques and optimization methods.In this paper,relevant technologies and methods of NoC testing are investigated,mainly involve wrapper scan chain design and test planning.The content and results are as follows:Firstly,how to optimize the test time under multiple constraints is an urgent problem to be solved in the network-on-chip(NoC)testing.An optimization method of NoC test scheduling based on sine cosine algorithm(SCA)is proposed.A parallel test method using dedicated test access mechanism(TAM)is adopted,and a test scheduling model for NoC is built to satisfy the power consumption and pin constraints.To achieve test time minimization,the population fluctuation with the sine and the cosine function around the optimal solution,and a group of random operators and adaptive variables are adopted.Comparing experiments on the ITC'02 test benchmarks show that the proposed algorithm can achieve shorter test time than that of the particle swarm optimization(PSO)and Multi-verse optimizer(MVO)algorithm.Secondly,as the test time for the IP core is directly related to the test wrapper scan chain(WSCD),this paper proposes the chaotic dragonfly algorithm(CDA)for the wrapper scan chain design to minimize the test time for embedded cores via balancing the wrapper scan chains.Since the WSCD problem is non-continuous,we improve the dragonfly algorithm(DA)with integer coding to make it suitable for the WSCD problem.To increase the population diversity and to prevent from trapping into local optima,we incorporate the chaos strategy to the DA.Furthermore,a repaired operator that considers the specific knowledge is added to the DA.Since the CDA is a swarm intelligence method,it is expected to effectively solve the NP-hard problem.Experimental results with the ITC'02 test benchmarks showed that the proposed algorithm can improve balanced consequences compared with existing algorithms,hence reducing the test time.
Keywords/Search Tags:NoC, test scheduling, sine-cosine algorithm, dragonfly algorithm, optimization
PDF Full Text Request
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