Research And Design Of Hybrid Integrated Gallium Arsenide Hall Device With Low Temperature Coefficient

At present,Hall sensors,with the Hall device as its core,have been widely used in modern industries,to transfer different motions into electrical signals in order to measure or control the kinetic components.Based on the Hall effect happening in semiconductor,Hall devices contactlessly exchange the change of physical quantities such as the formation,pressure,speed or position into the variation of the Hall voltage.Material characteristics of Hall device are temperature dependent and the output of Hall voltage varies non-linearly with the change of temperature,which causing the decline of measuring or controlling accuracy.One of the main materials of Hall devices is Gallium Arsenide(GaAs),which is irreplaceable due to its wide range of working temperature.However,the temperature drift of GaAs is-0.06 %/K,which needs to be compensated in some high-accuracy applications.A simulation model for the temperature drift of Greek-cross GaAs Hall Components,based on compensations for depletion effects and iterative calculations for weights of scattering mechanisms,is established in this work.It is available for non-saturation operation under weak fields.The simulation for a specific Hall component design was performed and simulation results were checked by the experimental data of real samples.Within the temperature of 233 to 358 Kelvin,the maximum relative error between simulated and measured Hall voltages is 1.21%.The maximum absolute error between simulated and measured temperature drifts of Hall voltage is 0.006 %/K.Hall voltages and temperature drifts of Hall voltage are all descendant with the increased temperature.This model,for the first time,accurately simulates the temperature drift caused by the change of intrinsic material characteristics for Greek-cross Hall components,which can provide quantitative criteria for compensation of Hall voltage.According to the simulation results and measured data,two compensation schemes of temperature drift of Hall devices have been discussed.The first scheme is to compensate Hall voltage directly,which reduces the temperature drift from-0.043~-0.028 %/K to-0.010~-0.005 %/K within the range of 233~358 Kelvin.The second one is to prepositively compensate the temperature drift by the modification of controlling current,which significantly improve the temperature drift and the maximum value of absolute temperature drift is 0.007 %/K.Taking applications and compensation results into account,the latter scheme is better than the former one.Then the layout of the current-compensated circuit was performed by Cadence IC617,which is the main design software of Integrated Circuit,based on the ON's C5 process of ON Semiconductor Co.,Ltd.The circuit area is about 130.35x167.25 square microns.In addition,several design parameters of hybrid Hall linear IC related to temperature drift of Hall voltage have been defined.According to Hall chip area,which is about 400x400 square microns,and the size of temperature compensation circuit,SOP14 package,which is one of the main standard package in Jiangsu Changjiang Electronics Technology Co.,Ltd(JCET),was selected.And the design requirement of the hybrid integrated processing in bonding stage was introduced briefly.