Implementation Of DDS Agile Source Controller Based On FPGA

As the heart of electronic communication systems,frequency sources have become more and more demanding with the continuous development of modern microwave systems.Today's frequency sources not only impose high requirements on frequency resolution,spurious and phase noise,but also require frequency sources to achieve agile output and control of output power.Therefore,it is imperative to study such a superior frequency conversion source with superior performance.The main content of this paper is the control and implementation of a low phase noise DDS agile source based on FPGA.A single frequency synthesis method is difficult to achieve a comprehensive performance frequency source.In order to realize a frequency source and satisfy the high resolution of the output signal,fast frequency hopping is realized under the premise of ensuring low phase noise and low spur suppression,and the large dynamic range of the output power can be regulated.The "PLL+DDS+ALC" solution was finalized for design implementation.This topic is mainly divided into three parts to design and realize:1)Reference source module scheme design,device selection,circuit schematic and layout design,and debugging after circuit implementation,mainly achieve function output low phase noise,low spurious point frequency signal.In order to meet the requirements of the index,the PLL phase-locked loop technology is adopted,and the 100 MHz constant temperature crystal oscillator is used as the loop reference signal,and the in-loop oscillator CRO is tuned and phase-locked by the analog sampling phase detector.Finally,the output point frequency is 3.5GHz,and the phase is realized.Point frequency source module with noise <-110dBc/Hz@1KHz,<-120dBc/Hz@10KHz,spurious suppression >70dBc.2)DDS module design,device selection,circuit schematic and layout design,and debugging after circuit implementation,using FPGA to control high-performance DDS chip AD9914 to achieve frequency control and frequency agility.The image frequency is suppressed by a two-stage low pass filter.It mainly realizes high-resolution signals output from 10 MHz to 1.4GHz;the fastest frequency switching time can reach 70 ns,the frequency step is 1KHz,and the output power is 5±2dBm.3)ALC module design,device selection,circuit schematic and layout design,and debugging after circuit implementation,mainly to achieve power control of the output signal.The power detection information is fed back to the FPGA by the detection circuit,and after the comparison calculation in the FPGA,the gain control device is controlled to accurately control the output power.Final output power range-45dBm~+15dBm,up to 60 dB dynamic range.Through the test of the agile signal source,the output frequency range is 10MHz~1.4GHz,the output power range is-45dBm~+15dBm,and the dynamic range is 60 dB.Phase noise <-110dBc/Hz@1KHz,spur suppression <-60 dBc,frequency hopping time at 70 ns,research and design of high frequency resolution,low phase noise,low spur,power controllable frequency conversion signal source.