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The Design And Implentation Of Rate Compatible LDPC Coder And Decoder

Posted on:2020-11-21Degree:MasterType:Thesis
Country:ChinaCandidate:Q LiuFull Text:PDF
GTID:2428330596975473Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
LDPC codes are used in various communication standards,such as 802.11 n standard and 4G standard,because their error correction performance is very close to Shannon limit.Because the existing LDPC coding and decoding algorithms still need a lot of resources,so the research of LDPC coding and decoding algorithm and the structure of the decoder is of great value.QC-LDPC code is a quasi-cyclic LDPC code,which can greatly reduce the implementation complexity and has a good parallel implementation structure.The LDPC code in IEEE 802.11 n is QC-LDPC code.In the aspect of encoder,this paper presents the implementation structure of LDPC rate compatibility in 802.11 n based on P-ORLA algorithm.For decoder,based on the original hierarchical decoding algorithm,this paper proposes an optimized hierarchical decoding algorithm,which can accelerate the convergence iteration of LDPC decoding,and gives the decoder structure compatible with code length and rate.The decoder achieves a rate of 2,supports three code lengths,1/2,2/3 and other decoding rates.Finally,the module development process in this paper is introduced.Through the simulation and synthesis of the design module,it proves that it meets the design requirements.
Keywords/Search Tags:LDPC, IEEE 802.11n, Error correction coding, Optimized Hierarchical Decoding Algorithms
PDF Full Text Request
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