Research And Implement Of Small Size Fingerpint Identification System Based On ARM

Fingerprint has been applied in forensics for a long time,due to its high Collectability,Distinctiveness and Permanence.With the rapid development of technology,the smaller size of sensor makes it possible to be equipped widely in mobile devices.And there were more and more applications using fingerprint identification in the daily life.Traditional embedded AFIS heavily relies on DSP,because of high complexity of algorithm.In this paper,traditional algorithm is improved to make it possible to run on low-cost ARM cortex-M3 platform,which will reduce the cost of AFIS and expand the application filed of fingerprint identification.In this paper,we focus on the optimization of preprocessing algorithm.The improved algorithms,including multi-level image segmentation,the combination of discrete direction calculation of whole image and precise direction calculation of minutia points,simplified implement of directional filter,were proposed to optimize real-time performance and space consumption of the system without losing the reliability of feature extraction.Due to the small sensing area of fingerprint scanners,the methods based on alignment of singular point fail and matching of partial fingerprint becomes challenges.The performance can be improved by feature fusion which combines several impression of the same finger.A novel algorithm which combines local structures and Local Binary Pattern(LBP)to get feature fusion was proposed.The super template could enlarge the valid area and increase the reliability of minutiae to overcome the disadvantage of small sensing area.The experimental results have shown that the proposed feature fusion scheme is effective in reducing FNMR of partial fingerprint matching.Finally,hardware verification platform is realized and we also achieve the fix-point implement of square root calculation and trigonometric functions which were involved in the algorithm.In addition,space and time consumption were further compressed by the optimization of the specific implementation details,so that the algorithm can be successfully transplanted to resource-constrained fixed-point ARM platform.