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Structure And Process Design Of Transient Blocking Protection Device

Posted on:2020-09-18Degree:MasterType:Thesis
Country:ChinaCandidate:M Q YangFull Text:PDF
GTID:2428330596476202Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Transient blocking protection device is a new circuit protection scheme.Unlike traditional solutions,transient blocking protection device is based on silicon technology,using JFET to detect inrush current,and depletion mode VDMOS to achieve blocking function.When the current returns to normal,the voltage across the transient blocking protector automatically falls back,and the protector automatically restarts to achieve the"self-recovery"function.At present,the domestic market is still dominated by traditional circuit protection schemes,and the transient blocking protector is still in the process of understanding.With the country's strong support for the semiconductor industry,the demand for transient blocking protectors in the country must increase in the future.This article takes this opportunity to design a bidirectional transient blocking protection device with a withstand voltage of 850V and a minimum trigger current of 500mA.The design of this thesis is divided into two parts:depletion mode VDMOS and control circuit.This thesis first summarizes the working principle of JFET and depletion mode VDMOS,and analyzes the dynamic and static characteristics and terminal theory of VDMOS.Based on the existing domestic process platform,the high-pressure process flow for 850V depletion mode VDMOS and the integrated process flow of discrete components of the control circuit are designed.The process simulation software TSUPREM4 is used to verify the VDMOS process is feasible or not,and the two-dimensional device simulation software MEDICI is used to optimize the electrical parameters of the cell and terminal of the depletion mode VDMOS.Finally,the breakdown voltage of the depletion mode VDMOS cell is 921V,the characteristic on-resistance is 18.7?·mm~2,the threshold voltage is-1.7V,and the breakdown voltage of the terminal is 887V.The simulation software SILVACO is used to verify the feasibility of the control circuit process,and the electrical parameters of each discrete device in the control circuit are optimized.Finally,the threshold voltage of the NMOS in the control circuit is 1.1V,and the characteristic on-resistance is 0.07?·mm2,while the breakdown voltage is 17V;JFET pinch-off voltage is 2.5V,and its linear region resistance is 3?;polysilicon resistance is 2502?/sq;polysilicon diode has a turn-on voltage drop of 0.43V and breakdown voltage of 9.9V.The trigger current of the control circuit is 650mA.Use software L-edit to achieve layout of each device.Finally,the electrical parameters of the depletion mode VDMOS and the control circuit are introduced into the circuit simulation software Cadence to verify the function of the transient blocking protector.Finally,the transient blocking protection device designed in this thesis can block the inrush current and achieve“self-recovery”.In this thesis,an 850V/500mA transient blocking protection device is designed.It is hoped that the design of future transient blocking unit and even the design of new circuit protection scheme based on semiconductor technology will have certain reference significance.
Keywords/Search Tags:Depletion mode VDMOS, JFET, process flow, layout, blocking protection
PDF Full Text Request
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