Fault-tolerant Cache Modeling And Fault Injection In HVP Platform

Nowadays,with the increasing integration and design scale of chips,the design and verification of electronic systems has become extremely tedious.The virtual platform,which can carry out rapid simulation at a higher abstract level,can greatly improve this kind of problems.The whole electronic system can be modeled quickly and evaluated efficiently on the virtual platform.As an important part of the electronic system,the reliability of Cache will directly affect the normal operation of the whole electronic system.Therefore,it is of great practical significance to model fault-tolerant Cache quickly at the level of virtual platform and to verify the fault-tolerant strategy of Cache efficiently,quickly and economically.In this paper,HVP virtual platform is selected as the research platform.The structure and work flow of Cache in the platform are studied.Based on the flexible and configurable characteristics of the platform,a fault-tolerant Cache model which can include a variety of fault-tolerant methods is modeled,and the corresponding selection ports are designed,through which different fault-tolerant methods can be selected.By analyzing the results of radiation experiments on memory cells by relevant researchers,aiming at the case of one and two bit data flipping with high frequency of failure,taking the segmentation parity check code and hamming code as examples,two specific fault tolerant methods are implemented for Cache,and the free selection of the two fault tolerant methods can be realized by configuring port parameters.In order to verify the fault-tolerant Cache in the platform,this paper designs a fault injection platform with three different levels of fault injection methods by analyzing the common fault injection methods and combining the charact eristics of the platform.Among them,the instruction set simulator which generates extended instruction set by TRAP Generator,is analyzed,and the fault injection method at instruction level is realized,The register for fault injection in Cache is established,the fault injection method at register level is realized by configuring the different parameters of register.The random fault injection unit of Cache is modeled,and the simulation fault injection method is realized.Finally,based on this fault injection platform,three fault injection methods are used to verify the two fault-tolerant methods in Cache by designing the corresponding test program.The results show the correctness of the fault-tolerant Cache.