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Research On The Optimization Of Dark Current In 55nm CMOS Image Sensors

Posted on:2017-10-22Degree:MasterType:Thesis
Country:ChinaCandidate:L C ZhangFull Text:PDF
GTID:2428330590990298Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Due to the advantages of low power,common manufacturing process and high-integrated property,CMOS image sensors(CIS)is widely applied into smartphone device.In order to achieve wonderful image,performance requirements for CIS is more and more complicated.In the early time,CIS is not widely used because of low resolution,dark current and poor picture quality issue.Nowadays,the active pixel CIS show up,that effectively solve the poor image quality issue,and CIS gets a rapid development.Dark Current is one of main issues,which affects CIS performance.This paper will focus on optimization of dark current in CIS.This paper firstly introduced the principle of CMOS image sensors and its three different type pixel structures,which including Passive Pixel Sensor,Active Pixel Sensor & Digital Pixel Sensor.Then,there is some description of three major issues,which could affect CIS image performance.In the end,this paper shared a case which caused by metal contamination during raw wafer production to explain the dark current failure mode.With non-metallic parts and more chamber cleaning,this dark current failure can be resolved by reducing about 8.4% white pixel.This paper also discussed the dark current problem,which caused by metal contamination during CIS manufacturing process.As Huali use special structure raw wafer,it is appropriate to use intrinsic gettering technique to capture metal impurities.With a 700?/4 hours anneal process in advance to enhance the gettering capability of raw silicon wafer,the final production could reduce white pixels about 5.38%.Finally,this paper studied the dark current problem caused by interface dangling bonds.By optimizing the passivation annealing process,which is current used by Huali,we reduce more dark current.After analyzing experimental data,we determine to extend the passivation annealing time from 30 minutes to 60 minutes for process optimization to effectively reducing device's dark current.The optimized CIS devices average white pixel drops about 15.4%.
Keywords/Search Tags:CIS devices, dark current, metal contamination, intrinsic gettering, passivation anneal
PDF Full Text Request
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