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Design Of Approximate FFT Processor And Its Application In Speech Recognition

Posted on:2020-04-07Degree:MasterType:Thesis
Country:ChinaCandidate:Q C LiaoFull Text:PDF
GTID:2428330590472323Subject:Circuits and Systems
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Due to the limitations of device fabrication process,the development of integrated circuit design has been forced to slow down in recent years.As data explosively increasing in our daily life,it poses a severe challenge to the performance and power consumption of chip designers.Approximate computing is studied extensively in which the accuracy loss is used appropriately to break through the bottlenecks in performance and power consumption of the conventional design.Approximate computing also shows effectiveness and feasibility in the error tolerant applications with more resilience to errors,such as speech processing,machine learning,image and video processing,pattern recognition and etc.After thorough analysis of the error composition and performance in conventional FFT architectures,Rearranging the bit-width of each stage in a FFT processor is proposed to achive low power and high performance approximate design.Firstly,this work makes a comparison among several approximate design techniques for DSP.Based on the conventional architecture,an approximate FFT design with configurable accuracy is realized by using different bit-width combinations.Secondly,two innovative bit-width selection algorithms are proposed.One is for resource optimization and the other is for performance optimization.Both of them are implemented in the four FFT archtectures(R2MDC,R4MDC,R4SDF and R2~2SDF)to prove the advantage of each algorithm.Thirdly,our proposed approximate designs are implemented on FPGA,and then the output error,resource consumption and frequency under different PSNR settings are measured.The results show that the approximate FFT using the first algorithm reduces hardware resources by37.8%,54.8%,60.2%and 55.8%for the four architectures,respectively.The second algorithm increases performance of the original design by 21.7%,56.9%,40.2%and 18.0%respectively.Finally,the proposed approximate FFT design is applied to the feature extraction module of the speech recognition system.Although the approximate scheme is introduced,the system recognition accuracy is reduced by no greater than 2%.Furthermore,the feature matrix extracted by approximate module is compared with the precise one,which shows the validity and feasibility of the proposed design.
Keywords/Search Tags:Approximate computing, FFT, Error Analysis, Bitwidth selection algorithm, Speech Recognition, FPGA
PDF Full Text Request
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