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Research On Algorithms Of Super Resolution Reconstruction Based On Maximum Likelihood Estimation And FPGA Implementation

Posted on:2020-06-30Degree:MasterType:Thesis
Country:ChinaCandidate:S Z GuoFull Text:PDF
GTID:2428330572974757Subject:Microelectronics and Solid State Electronics
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With the development of IoT technology,end users have higher requirements for image quality,especially in the fields of automatic driving,security,etc.Low-resolution images with missing details have become an important factor limiting users'efficiency on catching image information.The image quality can be improved by expanding the size of detector array,but it relies on redesigning the corresponding readout circuit and the lens group.Besides,the time and economic cost required growth exponentially with the array size.As a part of post-processing,super-resolution image reconstruction algorithm can effectively improve the resolution of the image and provide richer visual-ization details in a shorter time without upgrading the existing equipment.In addition,in order to meet the low power consumption and real-time requirements of IoT termi-nal devices,it is necessary to use an efficient reconstruction algorithm and a suitable platform for system design.This dissertation first analyze two super-resolution reconstruction algorithms based on multi-frame and single frame respectively,briefly introduce those typical algorithms,make qualitative comparisons fro,m the aspects of imaging quality and algorithm robust-ness,highlight the characteristics of difference reconstruction algorithms,and take the multi-frame reconstruction algorithm as the main research object in this dissertation.Based on the assumption that the observation system faces the specific scene for the first time,that is,from the perspective of zero prior knowledge,the super-resolution reconstruction algorithm based on maximum likelihood estimation is selected as the target algorithm in this dissertation.Considering the characteristics of the networked device and the trade-off between computational power and processing speed,the super-resolution reconstruction algorithm based on the maximum likelihood estimation is op-timized to reduce computational overhead and real-time difficulty.Finally,we speeds up the algorithm further through FPGA hardware acceleration which matches the low-power requirement of the IoT.The main work and research results of this dissertation are as follows:(1)In the gradient descent algorithm of maximum likelihood estimation,the idea of backpropagation algorithm is referenced in this dissertation,and the reconstruction error is backpropagated to the high-resolution estimated image.Comparing to downsampling matrix,the method in this dissertation avoids matrix calculation with complexity of O(n2),therefore it saves a large amount of computational power.(2)During the hardware implementation progress,the hardware design of the initial image generation module,registration module,gradient descent and other modules in the super-resolution reconstruction algorithm based on maximum likelihood estimation is carried out.According to the data dependencies between modules,a parallel archi-tecture which suitable for pipeline processing is designed.In order to further improve the overall performance of the system,a heterogeneous IoT ring structure is designed at the expense of part of the on-chip area.(3)The optimized algorithm is verified in this dissertation using a standard super-resolution reconstruction benchmark called Set 14.Compared with other algorithms,this dissertation reconstructs higher quality images,and gives detailed image even un-der the influence of noise.The image super-resolution reconstruction system is im-plemented on the Xilinx VC707 FPGA development platform.The system resources and system performance are tested and evaluated using photographs on the spot.When reconstructing a low resolution image sequence with a resolution of 640x480,the calcu-lation time is 158ms,which can meet the real-time requirements of various applications.
Keywords/Search Tags:Maximum likelihood estimate, Super-resolution reconstruction, Hardware acceleration, Field programmable logic array
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