Design Of Several IP Modules In SoC Design Platform

The rapid development of semiconductor technology has made the circuit scale of integrated circuits more and more large,and has brought about an overall improvement in functions.A single-ftmction simple chip has been unable to meet the needs of users in complex and diverse application scenarios.SoC(System-on-Chp)design method is proposed in this context.SoC has become the eurrent mainstream and development direction of IC technology and industry.Meanwhile the platform-based SoC design method has become the mainstream of SoC design technobgy,because of its advantages of high design reuse rate,short design cycle and high design reliability.Therefore the development of SoC design platform based on design reuse technology has important research significance.SoC design platform mainly relies on IP reuse technotogy.This these designs and devetops several IP(Intellectual Property)modules for the SoC design platform,mainly covering AHB/APB bus,memory controller,general system function device and geneal communication interfece.The thesis designs the AHB/APB bus,three kinds of memory controllers such as SRAM controller,Flash controller and SD controller,three kinds of system function devices such as interrupt controller,DMA controller and imer,and four kinds of communication interfaces such as UART interfece,SPI interface,IIC interface and GPIO interface.The thesis respectively gives out the structural design and module patitioning scheme of these IP modules,and eompletes the detailed design of their component modules.In design of the SRAM controller,an automated configuration scrpt is developed which can automatically generate the RTL source code of an SRAM controller that is conpatible wih the user-specified SRAM configuration.Combining Makefile scrpt,Perl script and UVM verification methodology,the thesis constructs an automatic verification platform for function simulation of circuit module.on this platform,the functfonal simulation of the IP modules designed in the thesis is performed.The simulation results show that these IP modules meet our functional requirements.