Design And Implementation Of FPGA For 802.11ax Transmitter

The rapid development of the Internet era brings new challenges to modern communication technology,higher transmission rate,greater user capacity and better user experience are the new requirements of wireless communication.On this account,IEEE launched the new 802.11 ax wireless communication protocol specification.Aimed at high dense environment,the 802.11 ax protocol introduced the OFDMA technology and the uplink MU-MIMO,so that the protocol data transmission rate can reach 4 times the 802.11 ac specification,coupled with the 4*4 MIMO can reach more than 10 Gbps.In order to verify the new protocol technology and lay a good foundation for the future of the commercialization,the main research direction of the subject is the development of FPGA prototype based on 802.11 ax,which coming from a project "802.11 ax prototype development project ".Based on the new protocol standard of 802.11 ax,we analyzed the data processing flow of transmitter,and then,according to the simulation platform,complete the hardware design and implementation of each module in the transmitter on the FPGA.In this paper,the detailed design and implementation of physical layer pretreatment,BCC processing,data mapping and IDFT are given.Finally,these modules are assembled into a transmitter,and the whole system is simulated and tested.In the overall simulation test results,the FPGA transmitter output and the Matlab fixed-point simulation results are compared to zero bit error,and the performance test results are given.In the implementation of transmitter FPGA,the implementation of some key data processing flow in transmitter is optimized.Among them,the most important is the hardware optimization of fast Fourier transform algorithm.In this paper,the detailed design and hardware implementation of reducing IFFT/FFT operation delay are given,and the results of hardware simulation and Matlab operation are compared,and the operational precision and performance advantages are given.