Research And Design Of Ble Digital Baseband Transceiver Circuit

With the development of artificial intelligence and Internet of things,the short-range and low-energy communication have broad application prospects.BLE becomes the most competitive of short-range wireless communication due to its low complexity,low cost,low power consumption and so on.Therefore,BLE transceiver circuit has become a research hotspot.A BLE digital baseband transceiver circuit is designed in this thesis,and the design of modulation and demodulation modules is the key research object.On the basis of the principle of GFSK modem,the realization scheme of the whole transceiver system is established,and I complete the design of the transceiver circuit in the paper.The main works include as bellow: the algorithm optimization of the transceiver system,MATLAB modeling and simulation,performance analysis,the design and optimization of the RTL circuit and the analysis of the results of the RTL simulation.The frequency offset estimation and decision circuit are improved for the system performance,and the complexity of the circuit and the resource consumption are also improved in trigonometric transformation.In the frequency offset estimation module,the Kalman filter is used to filter the in-band noise.The tracking characteristics of the Kalman filter fit the change of frequency offset with time,and the accuracy of the frequency offset estimation is improved.The decision circuit uses the equalizer to reduce the inter-symbol interference.In the trigonometric transformation module,the look-up table based on NCO is used to reduce the size of the ROM table.The bit synchronization and the frame synchronization are realized by the correlator.The complexity and resource consumption of the synchronization module are reduced without reducing the performance,while the delay mechanism is used to improve the detection performance of the synchronization words.At the end of this thesis,the function verification and DC synthesis of the circuit are carried out.The results show that under the condition of 13 MHz system clock and 10 dB SNR,the BLE digital baseband receiver circuit can demodulate the received information correctly,and the BER is less than 0.1%.The improved frequency offset estimation circuit and decision circuit improve the performance.The carrier frequency offset can be-247kHz~200kHz,and the modulation frequency offset can be-120kHz~175kHz.The trigonometric transformation module saves about 60% compared with the traditional circuit hardware resources.