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The Design And Implementation Of Multi Core DSP Debugging-Agent And High-speed Emulator

Posted on:2019-03-16Degree:MasterType:Thesis
Country:ChinaCandidate:X L HuFull Text:PDF
GTID:2428330551961931Subject:Computer technology
Abstract/Summary:PDF Full Text Request
With the rapid development of SOC system integration technology,multi-core digital and signal processor(DSP)is becoming more and more popular.Parallel programs which are running and debugging on multi-core DSP are becoming more and more complex.However,how to debug these parallel programs efficiently and accurately has become an important difficulty in determining the development cycle of a program.Therefore,it is of great significance to study the multi core DSP debugging scheme based on JTAG protocol.According to the debugging problem of multi-core DSP,a JTAG debug scheme based on USB interface is designed and implemented.The scheme has advantages in multi-core debugging architecture optimization and communication mechanism optimization,which can greatly reduce the program development cycle and improve resource utilization.In this paper,firstly the current research status of multi core and parallel debugging is introduced,and the concepts related to the debugging agent are introduced yet.By comparing and analyzing the existing debugging mode and combining its advantages,the design method in this paper is determined.The design method includes two parts:software and hardware.The hardware part is composed of at91sam7x-ek ARM simulator and four cores DSP target board,and the host terminal is connected with simulator through USB serial port.The software part includes the driver program and the debugging-agent.Debug agent is divided into two parts:one part is run in the host,the host is responsible for receiving debugging instructions from GDB and translating for the customized instructions;the other part is run on the atglsam7x-ek ARM terminal emulator,to receive the instruction and translate into JTAG instructions and then sent to the target board DSP.Finally,debugging instructions are sent,translated,JTAG commands are conversed and other debugging operations.In order to improve the data transmission rate and the parallel processing capability of the debugging-agent,the above design is also optimized.On the basis of the above design,the ARM simulator is replaced by FPGA-Spartan6 XC6SLX100T,and the data is transmitted by PCIEŚ1,which is upgraded to 512MB/S in PCIE from the original transmission rate 480MB/S in USB2.0.The data transmission rate and the parallel processing of the program have been improved effectively.The design results and practical verification show that the multi-core DSP debugging-agent and high-speed simulator designed in this paper are feasible,simple and extensible,and meet the needs of multi-core DSP online debugging.
Keywords/Search Tags:DSP, JTAG, GDB, DEBUGGING-AGENT, ARM, PCIE
PDF Full Text Request
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