Research On Shared Cache Partition And Replacement Strategy Based On CMP

With the development of integrated circuit technology,chip multi processor technology is getting maturing.Now multi-core processor has been widely used in servers because it has significant advantages in multitasking and hign performance computing,and is becoming popular in some emerging areas such as scientific computing,biological research,structural simulation,and nanotechnology.However,some factors restrict the performance improvement of multi-core processors,such as the memory wall problem,that is,the running speed of the processor is much higher than the growth of memory reading and writing.cache is the first station that the processor core accesses data from memory,and its efficient management strategy plays an important role in alleviating the memory wall problem and improving the performance of CMP system.For the partition and replacement of shared cache in CMP,the paper proposes a FPRO method.The method includes the shared cache partitioning based on fairness and throughput and shared cache replacement algorithm DLRU.For the shared cache partitioning,with L2 Cache in the case of shared and exclusive invalidation ratio as first standard,and the throughput rate of CMP system as second standard,through three stages,initialization,borrowing and repayment to dynamically partition the shared cache,realizing the shared cache partitioning fairness and the system throughput.For the shared cache replacement algorithm DLRU,three strategies of insertion strategy,promotion strategy and expulsion strategy are adopted to complete the swap and swap out of data block,the insertion strategy and promotion strategy are the improvement and optimization of the replacement algorithm LRU.In the insertion strategy,the data block is first inserted by setting the PMRU bit.In the promotion strategy,to extend the existence time of shared data in cache space as much as possible,the paper divide the data blocks into the shared data blocks and private data blocks,and set different priorities to differentiate.DLRU algorithm effectively reduces the existence time of low frequency data blocks in the cache space,and avoids the waste of cache space.Finally,experiments were tested on the simulation platform using the M5 simulator and the benchmark,with the system throughput,cache loss rate,the weighted speedup and the fairness of the system to analysis the results.The experimental results show that the Fair Partitioning and Replacement Optimization method improves the memory access performance of system.