The Chip Prototype Verification Of An Encryption Algorithm

With the rapid development of data communication technology,the requirements of different user groups for communication systems have become higher and higher.How to ensure the safe and efficient operation of communication systems has become a problem that we need to pay attention to.Therefore,encryption technology will assume the responsibility of ensuring data security in communication systems.However,in the semiconductor industry,custom-designed cryptographic chips and encrypted IP used for semi-custom chips have become a common method for encrypting data on hardware.In the encryption technology,the types of encryption algorithms are usually divided into symmetric encryption algorithms and asymmetric encryption algorithms.Due to the application scenarios of this thesis is mainly in digital signature and authentication,according to research purposes and the direction finally selects an elliptic curve encryption algorithm based on a finite field in an asymmetric encryption algorithm as the algorithm basis for the encryption technology hardware implementation.In the asymmetric cryptosystem,elliptic curve cryptography will gradually replace RSA,which is a traditional asymmetric cryptosystem.However,the complexity of elliptic curve algorithm can be quickly and efficiently in the process of hardware implementation.The completion of data encryption becomes a place that needs continuous improvement.This scheme integrates the method of rapid implementation of some internal arithmetic modules,and combines its own design to improve.Using the top-down hardware design method,the elliptic curve encryption algorithm is implemented by hardware description,and the data encryption and decryption function is finally completed.The completed work specifically includes the following points:1.Explained some research background and research significance of cryptography,and introduced the basic mathematics theory knowledge of elliptic curve correlation,including the representation method of points,the algorithm of group,and related concepts of finite field.2.Comparing the advantages and disadvantages of the top-down and bottom-up design concepts,the top-down design approach was chosen to complete the overall architecture of hardware implementation and the hardware design flow of each submodule,and according to the computation module of rapid algorithm description to complete each module hardware design process scheme.3.Based on the top-down design concept,algorithms that describe the functions of each sub-module are implemented in turn using the hardware description language verilog,and resource consumption is reduced as much as possible in the implementation of the code,and list some key to improve the state machine code4.Building testbench verification environment in EDA tools Modelsim,and will be completed by the synthesis of RTL code verification environment to complete the single simulation and the whole simulation of functional simulation verification.5.In conclusion,summed up the implementation of the project process and proposes the corresponding improvement,these improvements points can better improve the hardware implementation of the scheme.Finally,the simulation verified that the plaintext data was encrypted by the encryption mode to obtain the ciphertext,and then the ciphertext was recovered from the plaintext through the decryption mode,and the data was verified to be successful.