Research On Low Feedback Sampling Rate Digital Predistortion For Wideband Communication System

The demands of the communication tasks are ever growing,high-order modulation techniques have been widely applied in the satellite communication system,which place greater demands on the power amplifiers(PAs).Power back-off is the simplest method to make the PAs behave linearity,resulting,however,in very low power efficiency.To achieve good efficiency and linearity,digital predistortion technique has drawn the most attention of the industrial and academic sectors among all the proposed linearization techniques.Based on the wideband digital predistortion system,this thesis focuses on the compensation of the nonlinear distortion and the high sampling rate of the feedback loop.The main work is as follows:The first part of this thesis provides a detailed introduction and analysis to the nonlinear characteristics and the performance evaluation criteria of the PAs.Then the principle of the behavioral modeling of Pas is studied and the most commonly known memory behavioral models are reviewed.The second part makes a deep research and comparison between the indirect and direct learning architectures.Then,based on the direct learning architecture and the memory polynomial model,a digital predistortion system is established in Matlab.The simulation results show that the method could achieve an outstanding performance.The third part focuses on the high sampling rate of the feedback circuits.The 1-bit digital predistortion method is theoretically deduced and proved,the simulation results show that this method could effectively meet the demand of the high sampling rate of the feedback loop by taking the ADC as a comparator.On the basis of the 1-bit digital predistortion method,a 1-bit digital predistortion with single feedback loop is proposed,which could only use I or Q of the PAs output signal and further reduce the costs.