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Design Of Multioperand Floating Point Arithmetic Controller Based On FPGA

Posted on:2015-10-24Degree:MasterType:Thesis
Country:ChinaCandidate:L L ZhangFull Text:PDF
GTID:2428330452465623Subject:Control theory and control engineering
Abstract/Summary:PDF Full Text Request
The FPGA is a kind of Programmable IC chip, it is mainly used for logic designwith arithmetic logic unit of complex algorithms and the signal processing unit?such asarithmetic unit?digital filter.This topic mainly to use the parallel operation characteristicsof FPGA to design multioperand floating-point arithmetic controller, Its main function is:After the controller is selected by the system,under the control of the internal timingpulse, to write and storage operation instructions or operand type and operands,independently complete the configuration and the operand process of operands, in theprocess of operation, to be able to read the middle result;Read the final computationresults after operation, at the same time to determine whether a result is abnormal, whenthe operation result is abnormal, abnormal operation sign module output interrupt signal,and reset write and read operation for pulse control module, to stop the work of thecontroller.The controller is mainly used in the treatment of some high speed and highprecision numerical calculation, Operation process can be completed independently.Thisdesign has achieved the following results:(1) Completed the design of the circuit structure of the single instruction multiplefloating point operands addition/subtraction, multiplication and division controller,Mainly by the command word and operands write timing control module, the operandread sequential control module, calculation and output control module and the operandsof memory module composed,and designed addition/subtraction, multiplication anddivision operation instruction format, and designed to store and readoperation instructionformat and operands and independently completing the operation process under the effectof internal timing pulse;the single instruction multiple operands floating-point divisioncontroller can realize the last result/operands, operands/last operation results, the firstoperand/second operand, the second operand/the first operand of division.(2) Completed the design of the circuit structure of the floating point plus/minus andmultiplication calculation execution controller, Mainly by the floating-point operandsconfiguration control module, pulse distributor, floating-point arithmetic unit and resultoutput control module composed;to design operation type and operation can performsautonomicly floating-point addition/subtraction, multiplication operation process underthe action of the internal temporal pulse.(3) Completed the design of In the Actel company Libero IDE v8.3integrationdevelopment software and ProASIC3StartKit hardware development platform, to carryout the function simulation and timing simulation the two kinds of controller, to Verifythe controller under the control of the internal temporal pulse can autonomy, properlycompleted multiple floating-point arithmetic operands.
Keywords/Search Tags:FPGA, Independent control, Floating point arithmetic unit, controller
PDF Full Text Request
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