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Design And Optimization Of High Efficiency Hardware Accelerator For The Key Algorithm Of SKA Science Data Processing

Posted on:2020-10-31Degree:MasterType:Thesis
Country:ChinaCandidate:Q WuFull Text:PDF
GTID:2392330620460085Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
SKA(Square Kilometer Array),which is currently under construction,will become the world's largest radio telescope.It is also a major international scientific project requiring the cooperation of many countries and organizations.SKA science data processing is an application with huge amount of data,high demand for computing performance and strict energy consumption limitation.There's no supercomputer that can meet the requirements of SKA.It is urgent to explore a new acceleration structure in this situation.FPGA is a computing platform which is highly paralleled and has low power consumption.So we mainly discussed the design of high-efficiency hardware accelerator for two key algorithms in SKA science data processing(gridding,degridding)based on FPGA for in this paper.This project started with the small-scale data processing of gridding algorithm at first,and set the structure of the kernel part by unfolding the third loop and adding pipeline.The functionality of the design was verified in both simulation and board level.Then we explored the structure of acceleration system for gridding algorithm with large-scale data.It cached the test data in on-chip DDR,and had customized memory control module and kernel operation module.The simulation result shows that the performance of the system is improved by 2.45 times compared to the software test.After that,we also accomplished the design of acceleration system for degridding algorithm with large-scale data.The top-level structure is similar to gridding algorithm,and the memory control module and kernel operation module are re-customized.The simulation result proves that the performance of acceleration system for degridding algorithm is 4.46 times over the software test.The acceleration system is optimized by dividing the grid into small block and caching each block on BRAM.Besides,this paper discussed several extensible optimizing directions,did the feasibility analysis and listed the theoretical acceleration efficiency,which will provide more optimizing ideas for the follow-up work of SKA science data processing.
Keywords/Search Tags:SKA, Science Data Processing, FPGA, High Performance Computing, (de-)Gridding
PDF Full Text Request
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